{"id":80323,"date":"2024-10-17T18:43:12","date_gmt":"2024-10-17T18:43:12","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-14536-1995\/"},"modified":"2024-10-24T19:43:07","modified_gmt":"2024-10-24T19:43:07","slug":"ieee-14536-1995","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-14536-1995\/","title":{"rendered":"IEEE 14536 1995"},"content":{"rendered":"
New IEEE Standard – Active. This International Standard provides a set of tools with which to implement a Futurebus+ architecture. This high-performance bus-based system architecture provides a wide range of performance and cost scalability over time for multiple generations of single- and muliple-bus multiprocessor systems. This document, a companion standard to ISO\/IEC 10857:1994 [ANSI\/IEEE Std 896.1,1994 Edition], builds on the logical layer by adding requirements for three military profiles. It is to these profiles that products will claim conformance.<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
---|---|---|---|---|---|---|---|
1<\/td>\n | Title Page <\/td>\n<\/tr>\n | ||||||
5<\/td>\n | Introduction <\/td>\n<\/tr>\n | ||||||
6<\/td>\n | Participants <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | CONTENTS <\/td>\n<\/tr>\n | ||||||
9<\/td>\n | 1. Overview 1.1 Scope <\/td>\n<\/tr>\n | ||||||
10<\/td>\n | 1.2 Applicability 2. Normative references <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | 3. Definitions 3.1 Special word usage 3.2 General definitions <\/td>\n<\/tr>\n | ||||||
15<\/td>\n | 4. Military Profile MIL-12SU 4.1 Reference specification <\/td>\n<\/tr>\n | ||||||
20<\/td>\n | 4.2 Logical layer detailed specifications <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | 4.3 Bus and node management <\/td>\n<\/tr>\n | ||||||
41<\/td>\n | 4.4 Physical layer detailed specification <\/td>\n<\/tr>\n | ||||||
80<\/td>\n | 4.5 Environmental <\/td>\n<\/tr>\n | ||||||
81<\/td>\n | 4.6 Systems configuration guide 4.7 Conformance testing 5. Military Profile MIL-10SU 5.1 Reference specification <\/td>\n<\/tr>\n | ||||||
89<\/td>\n | 5.2 Logical layer detailed specification <\/td>\n<\/tr>\n | ||||||
91<\/td>\n | 5.3 Bus and node management 5.4 Physical layer detailed specification <\/td>\n<\/tr>\n | ||||||
114<\/td>\n | 5.5 Environmental <\/td>\n<\/tr>\n | ||||||
116<\/td>\n | 5.6 Systems configuration guide 5.7 Conformance testing <\/td>\n<\/tr>\n | ||||||
117<\/td>\n | 6. Military Profile MIL-Format E 6.1 Reference specification <\/td>\n<\/tr>\n | ||||||
124<\/td>\n | 6.2 Logical layer detailed specification <\/td>\n<\/tr>\n | ||||||
125<\/td>\n | 6.3 Bus and node management 6.4 Physical layer detailed specification <\/td>\n<\/tr>\n | ||||||
146<\/td>\n | 6.5 Environmental <\/td>\n<\/tr>\n | ||||||
148<\/td>\n | 6.6 System configuration guide 6.7 Conformance testing <\/td>\n<\/tr>\n | ||||||
149<\/td>\n | Annex A Military-specific standard units <\/td>\n<\/tr>\n | ||||||
177<\/td>\n | Annex B Modular open architecture overview <\/td>\n<\/tr>\n | ||||||
190<\/td>\n | Annex C Current per connector pin <\/td>\n<\/tr>\n | ||||||
194<\/td>\n | Annex D Example ROM entries for a MIL profile module <\/td>\n<\/tr>\n | ||||||
201<\/td>\n | Annex E Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" ISO\/IEC 14536:1995 [ANSI\/IEEE Std 896.5-1995] Information technology – Microprocessor systems – Futurebus+(R), Profile M (Military)<\/b><\/p>\n |