{"id":421791,"date":"2024-10-20T06:38:07","date_gmt":"2024-10-20T06:38:07","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bsi-pd-iec-tr-61850-7-5002017-2\/"},"modified":"2024-10-26T12:25:03","modified_gmt":"2024-10-26T12:25:03","slug":"bsi-pd-iec-tr-61850-7-5002017-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bsi-pd-iec-tr-61850-7-5002017-2\/","title":{"rendered":"BSI PD IEC\/TR 61850-7-500:2017"},"content":{"rendered":"
This part of IEC 61850, which is a technical report, describes the use of the information model for devices and functions of IEC 61850 in applications in substation automation systems, but it may also be used as informative input for the modeling of any other application domain. In particular, it describes the use of compatible logical node names and data objects names for communication between Intelligent Electronic Devices (IED) for use cases. This includes the relationship between Logical Nodes and Data Objects for the given use cases. If needed for the understanding of the use cases, the application of services is also described informatively. If different options cannot be excluded they are also mentioned.<\/p>\n
The modelling of the use cases given in this document are based on the class model introduced in IEC 61850-7-1 and defined in IEC 61850-7-2. The logical node and data names used in this document are defined in IEC 61850-7-4 and IEC 61850-7-3, the services applied in IEC 61850-7-2. The naming conventions of IEC 61850-7-2 are also applied in this document.<\/p>\n
If extensions are needed in the use cases, the normative naming rules for multiple instances and private, compatible extensions of Logical Node (LN) Classes and Data Object Names defined in IEC 61850-7-1 are considered.<\/p>\n
IEC 61850-7-5 describes in examples the use of logical nodes for modeling application functions and related concepts and guidelines in general, independently from any application domain respectively valid for all application domains in the electric power system (substation automation, distributed energy resources, hydro power, wind power, etc.). This document describes in examples the use of logical nodes for application functions in substation automation including also line protection between substations. It also implies some tutorial material where helpful. However it is recommended to read IEC 61850-5 and IEC 61850-7-1 in conjunction with IEC 61850-7-3 and IEC 61850-7-2 first.<\/p>\n
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2<\/td>\n | undefined <\/td>\n<\/tr>\n | ||||||
4<\/td>\n | CONTENTS <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
10<\/td>\n | INTRODUCTION <\/td>\n<\/tr>\n | ||||||
11<\/td>\n | 1 Scope 2 Normative references <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | 3 Terms, definitions and abbreviated terms 3.1 Terms and definitions <\/td>\n<\/tr>\n | ||||||
13<\/td>\n | 3.2 Abbreviated terms <\/td>\n<\/tr>\n | ||||||
14<\/td>\n | 4 Basics of substation automation with IEC 61850 4.1 Architecture 4.2 Communication and relevance of bus definitions Figures Figure 1 \u2013 Architecture of a substation automation system <\/td>\n<\/tr>\n | ||||||
15<\/td>\n | 5 Summary of substation automation functions 5.1 HMI and related station level functions 5.2 Operational or control functions 5.3 Monitoring and metering functions 5.4 Local automation functions (protection and others) 5.5 Distributed automation functions (protection and others) <\/td>\n<\/tr>\n | ||||||
16<\/td>\n | 5.6 System support functions 6 Basic interaction of control and protection functions modeled by logical nodes <\/td>\n<\/tr>\n | ||||||
17<\/td>\n | Figure 2 \u2013 Interaction of LNs for the application functionsin SA focused on XCBR Tables Table 1 \u2013 Short summary of logical nodes names <\/td>\n<\/tr>\n | ||||||
18<\/td>\n | Figure 3 \u2013 Interaction of LNs for the applicationfunctions in SA focused on XSWI <\/td>\n<\/tr>\n | ||||||
19<\/td>\n | 7 Function allocation and logical architecture 7.1 Allocation of functions to IEDs 7.2 Data Model as used in this Technical Report 7.3 Logical architecture 7.3.1 Station level 7.3.3 Process level 7.4 Interfaces 7.4.1 Interface to CC and other remote operator places <\/td>\n<\/tr>\n | ||||||
20<\/td>\n | 7.4.2 Interface to neighbouring substation 7.4.3 Interface to the process (switchyard) 7.4.4 Implementation remark 8 Communication system architectures 8.1 Modeling and communication architectures 8.2 Specific modeling aspects of the process interface 8.2.1 Merging unit and data sampling <\/td>\n<\/tr>\n | ||||||
21<\/td>\n | 8.2.2 Breaker IED and switchgear control 8.2.3 Time synchronization 8.3 Use cases 8.3.1 General remarks <\/td>\n<\/tr>\n | ||||||
22<\/td>\n | 8.3.2 Station bus and process bus separated Figure 4 \u2013 Station bus and process bus separated <\/td>\n<\/tr>\n | ||||||
23<\/td>\n | 8.3.3 Station bus and process bus connected by proxy servers <\/td>\n<\/tr>\n | ||||||
24<\/td>\n | Figure 5 \u2013 Station bus and process busconnected by proxy servers Figure 6 \u2013 Station bus and processbus interconnected <\/td>\n<\/tr>\n | ||||||
25<\/td>\n | 8.3.4 Station bus and process bus interconnected 8.3.5 Common features for all three use case architectures <\/td>\n<\/tr>\n | ||||||
27<\/td>\n | Table 2 \u2013 Mapping of communication services to architectures 1a, 1b, 2a, 2b, 3 <\/td>\n<\/tr>\n | ||||||
28<\/td>\n | 9 Basic modeling principles 9.1 Protection, measurement and control Figure 7 \u2013 Basic LN models for (a) protection, (b) measurement and (c) control <\/td>\n<\/tr>\n | ||||||
30<\/td>\n | 9.2 Supervision Figure 8 \u2013 Basic LN models for supervision of (a) insulation,(b) temperature and (c) arc <\/td>\n<\/tr>\n | ||||||
31<\/td>\n | 10 General modelling issues in substations 10.1 Basic modelling of three-phase systems 10.1.1 Acquisition of position indication Figure 9 \u2013 Relation between the phase-relatedpositions and the common position <\/td>\n<\/tr>\n | ||||||
32<\/td>\n | 10.1.2 Acquisition of currents and voltages and the trips Figure 10 \u2013 Filtering of phase related positiondata to a common position <\/td>\n<\/tr>\n | ||||||
33<\/td>\n | 10.2 Considering transmission times for GOOSE messages Figure 11 \u2013 Acquisition of current and voltage andtripping in the three phase system <\/td>\n<\/tr>\n | ||||||
34<\/td>\n | 11 Control 11.1 Bay control without process bus 11.1.1 Basic diagram Figure 12 \u2013 Modelling bay control without process bus (left: ok, right: wrong) <\/td>\n<\/tr>\n | ||||||
35<\/td>\n | 11.1.2 General modeling rules 11.1.3 Modeling with process interface nodes and the role of GGIO and GAPC <\/td>\n<\/tr>\n | ||||||
36<\/td>\n | Figure 13 \u2013 Bay control with non-defined process object \u201cdoor\u201d represented by LN GGIO <\/td>\n<\/tr>\n | ||||||
37<\/td>\n | 11.2 Bay control with process bus 11.2.1 Basic diagram Figure 14 \u2013 Bay control (left: without process bus, right: with process bus) <\/td>\n<\/tr>\n | ||||||
38<\/td>\n | 11.3 Control in the three-phase system 11.3.1 Interconnection of logical nodes Figure 15 \u2013 Three-phase (left and middle) and single-phase control (right) with process bus <\/td>\n<\/tr>\n | ||||||
39<\/td>\n | 11.4 Interlocking, synchrocheck and blocking 11.4.1 General remarks <\/td>\n<\/tr>\n | ||||||
40<\/td>\n | Figure 16 \u2013 Interlocking, synchrocheck and blockingcheck in control IED without PB <\/td>\n<\/tr>\n | ||||||
41<\/td>\n | 11.4.2 Interlocking Figure 17 \u2013 Interlocking, synchrocheck andblocking check with process bus PB <\/td>\n<\/tr>\n | ||||||
42<\/td>\n | 11.4.3 Blocking 11.4.4 Recommendation <\/td>\n<\/tr>\n | ||||||
43<\/td>\n | 11.4.5 Synchrocheck 11.5 Control authority 11.5.1 Operation 1 out of n Figure 18 \u2013 Relation between interlocking, synchrocheck,blocking and control authority <\/td>\n<\/tr>\n | ||||||
44<\/td>\n | 11.5.2 Control authority management <\/td>\n<\/tr>\n | ||||||
45<\/td>\n | Table 3 \u2013 Logical nodes with control authority and related presence conditions <\/td>\n<\/tr>\n | ||||||
47<\/td>\n | 11.5.3 Logical node representation Figure 19 \u2013 Local remote authority switching at bay and process level <\/td>\n<\/tr>\n | ||||||
48<\/td>\n | Figure 20 \u2013 Station level authority switching <\/td>\n<\/tr>\n | ||||||
49<\/td>\n | 11.6 Operation of switchgear with process bus 11.6.1 The control service 11.6.2 Extension of the control model by GOOSE messages in tabular form <\/td>\n<\/tr>\n | ||||||
50<\/td>\n | Table 4 \u2013 Extension of the control model by GOOSE messages between CSWI and XCBR <\/td>\n<\/tr>\n | ||||||
51<\/td>\n | 11.6.3 Extension of the control model by a sequence of GOOSE control messages Figure 21 \u2013 Switch control (SBO with enhanced security) with a sequence ofGOOSE control messages between BCU (\u201cCSWI\u201d)and CBC (\u201cXCBR\u201d) \u2013 Part 1 <\/td>\n<\/tr>\n | ||||||
52<\/td>\n | Figure 22 \u2013 Switch control (SBO with enhanced security) with a sequenceof GOOSE control messages between BCU (\u201cCSWI\u201d)and CBC (\u201cXCBR\u201d) \u2013 Part 2 <\/td>\n<\/tr>\n | ||||||
53<\/td>\n | 11.6.4 Alignment of the control model in CSWI and XCBR 11.6.5 Behavior \u201cBlocked\u201d and \u201cTestblocked\u201d in case of process bus <\/td>\n<\/tr>\n | ||||||
54<\/td>\n | 12 Protection 12.1 Bay protection without process bus 12.1.1 Basic diagram 12.1.2 Modeling rules Figure 23 \u2013 Bay protection without process bus (left: modeling = ok, right: modeling = wrong) <\/td>\n<\/tr>\n | ||||||
55<\/td>\n | 12.2 Bay protection with process bus 12.2.1 Basic diagram Figure 24 \u2013 Bay protection (left: without process bus,right: with process bus) <\/td>\n<\/tr>\n | ||||||
56<\/td>\n | 12.2.2 Modeling protection of three-phase system 12.3 Modelling of a protection function by multiple instances 12.3.1 PDIF Figure 25 \u2013 Three-phase trip (left) and single-phasetrip (right) with process bus <\/td>\n<\/tr>\n | ||||||
57<\/td>\n | 12.3.2 PDIS 12.4 Modelling of different stages of a protection function by multiple instances 12.4.1 Different trip levels and curves shown by PTOC as example 12.4.2 PDSC \u2013 Phase discrepancy protection <\/td>\n<\/tr>\n | ||||||
58<\/td>\n | Figure 26 \u2013 Phase discrepancy protection <\/td>\n<\/tr>\n | ||||||
59<\/td>\n | 13 Redundant protection and control 13.1 Redundant protection Figure 27 \u2013 Single phase tripping and supervisionby main 1 and main 2 protection <\/td>\n<\/tr>\n | ||||||
60<\/td>\n | 13.2 Redundant control Figure 28 \u2013 Single phase redundant control <\/td>\n<\/tr>\n | ||||||
61<\/td>\n | 13.3 Use of PTRC and testing Figure 29 \u2013 Basic use of PTRC for protection tripping Figure 30 \u2013 PTRC used for grouping of closely related LNs <\/td>\n<\/tr>\n | ||||||
62<\/td>\n | 14 Circuit breaker modelling by breaker related LNs (XCBR, SCBR and SOPM) Figure 31 \u2013 Two PTRCs for partial testing of the protection functions <\/td>\n<\/tr>\n | ||||||
63<\/td>\n | 15 Dedicated functions 15.1 Disturbance recording <\/td>\n<\/tr>\n | ||||||
64<\/td>\n | Figure 32 \u2013 Structure of the disturbance recorder (RDRE, RADR, RBDR) <\/td>\n<\/tr>\n | ||||||
65<\/td>\n | 15.2 Point-on-wave switching <\/td>\n<\/tr>\n | ||||||
66<\/td>\n | Figure 33 \u2013 Point-on-wave switching with all LNs needed in one IED (IED1) Figure 34 \u2013 Point-on-wave switching with Merging Unit (MU) in IED2 <\/td>\n<\/tr>\n | ||||||
67<\/td>\n | Figure 35 \u2013 Point-on-wave switching with processbus and time synchronization <\/td>\n<\/tr>\n | ||||||
68<\/td>\n | 15.3 Breaker failure protection Figure 36 \u2013 Single and three-phase trippingand breaker failure protection <\/td>\n<\/tr>\n | ||||||
69<\/td>\n | Figure 37 \u2013 Single phase tripping and breaker failure protectionin a double tripping coil application <\/td>\n<\/tr>\n | ||||||
70<\/td>\n | 15.4 Line differential protection <\/td>\n<\/tr>\n | ||||||
71<\/td>\n | 15.5 Line distance protection Figure 38 \u2013 Three-end line differential protection with LN RMXU <\/td>\n<\/tr>\n | ||||||
72<\/td>\n | 15.6 Autorecloser (RREC) 15.6.1 Introduction 15.6.2 Autorecloser interconnection Figure 39 \u2013 Distance protection with communication(block, permit, direct trip) <\/td>\n<\/tr>\n | ||||||
73<\/td>\n | Figure 40 \u2013 Interaction of autorecloser (RREC)with other functions <\/td>\n<\/tr>\n | ||||||
74<\/td>\n | 15.6.3 Autorecloser states and transitions Figure 41 \u2013 Autoreclosure (RREC) states and transitions(dashed transitions are examples for possiblealternative transitions \u2013 see text) <\/td>\n<\/tr>\n | ||||||
77<\/td>\n | 15.7 Switch on to fault 15.7.1 LN: Switch on to fault Name: PSOF <\/td>\n<\/tr>\n | ||||||
78<\/td>\n | 15.8 Reverse blocking Figure 42 \u2013 Switch-on-to-fault protection function PSOF <\/td>\n<\/tr>\n | ||||||
79<\/td>\n | Figure 43 \u2013 Reverse blocking data flow with one infeed <\/td>\n<\/tr>\n | ||||||
80<\/td>\n | Annex A (normative)Switch-on-to-fault <\/td>\n<\/tr>\n | ||||||
81<\/td>\n | Annex B (normative)LN PSOF <\/td>\n<\/tr>\n | ||||||
84<\/td>\n | Annex C (normative)LN RREC: Autoreclosure <\/td>\n<\/tr>\n | ||||||
86<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Communication networks and systems for power utility automation – Basic information and communication structure. Use of logical nodes for modeling application functions and related concepts and guidelines for substations<\/b><\/p>\n |