IEEE 1386.1-2001
$31.96
IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards: PMC
| Published By | Publication Date | Number of Pages |
| IEEE | 2001 |
New IEEE Standard – Inactive-Withdrawn. This standard, in conjunction with IEEE Std 1386-2001, IEEE Standard for a CommonMezzanine Card (CMC) Family, defines the physical and environmental layers of a PCI mezzaninecard (PMC) family to be usable on (but not limited to) single slot VME, VME64 and VME64x boards,CompactPCI boards, Multibus I and Multibus II boards, desktop computers, portable computers,servers, and similar types of applications. The electrical and logical layers are based on the PCIspecification from the PCI Special Interest Group. The PCI mezzanine cards allow for a variety ofoptional function expansions for the host system. I/O functionality from the PMC may be either through the mezzanine front panel, or via the backplane by routing the I/O signals through themezzanine connector to the host.
PDF Catalog
| PDF Pages | PDF Title |
|---|---|
| 1 | Title Page |
| 3 | Introduction Participants |
| 5 | CONTENTS |
| 7 | 1. Overview 1.1 Scope 1.2 Purpose 1.3 General arrangement |
| 8 | 1.4 Dimensions 2. References |
| 9 | 3. Definitions 3.1 Special word usage 4. Mechanics and compliance 4.1 Conformance 4.2 PMC voltage keying 4.3 Connector configurations 4.4 Power consumption, heat dissipation, and air flow 4.5 Electromagnetic compatibility |
| 10 | 4.6 Shock and vibration 4.7 Environmental 4.8 Mean-time-between-failure (MTBF) 5. Electrical and logical layer 5.1 Connector utilization 5.2 PMC connector pin assignment |
| 13 | 5.3 Comparison of pin usage, PCI to PMC 5.4 Mapping of PCI reserve pins |
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